Chris Auth
Related people
Episodes
Notes
Dwarkesh Podcast · What will computer chips look like in 2045?
-
Why Can't Logic Chips Stack Like Memory?
Chris Auth says logic chips cannot stack like memory because logic uses more power and the heat has no clear way out.
Chips pair N-type and P-type transistors, built side by side today. Stacking one on top of the other, a CFET, or complementary field-effect transistor, would fit twice as many transistors in the same area. Every extra layer adds manufacturing steps, cost, and heat. Stacks of DRAM that make high-bandwidth memory, and 3D NAND, do not transfer to logic for that reason.
Three things limit compute: how fast the device can switch, how much power the switch takes, and how the heat from that switch gets out. Those three limits were already being written about 20 years ago. Thermal
-
What Will Computer Chips Look Like in 2045?
Chris Auth says chips in 2045 can be exotic three-dimensional structures, with transistors floating in the interconnect and stacked the way memory already stacks, rather than a flat substrate with every layer piled on top.
Gate-all-around looks inevitable to him. The industry was already talking about that transistor shape in the 1990s. Backside power is the stranger step. Stripping off the silicon substrate and putting lines on the back was still an outlier idea in the 1990s. Copper stays the right metal for the larger wires. The tightest pitches are where another material replaces copper. Once gate-all-around and backside power are both in place, the transistor sits inside the wiring, and
-
Why Does high-NA EUV Pay Off for Intel and Not TSMC?
Chris Auth says high-NA extreme ultraviolet lithography pays off for Intel, and not yet for TSMC, because Intel's backside power relaxes the front-side wiring enough for one pass.
Standard EUV machines have a numerical aperture of 0.33. High-NA widens that cone of light to 0.55 and can print features about 1.7 times smaller in one pass. Patterns tighter than one pass can print are split across two, three, or even four passes. Each extra pass uses time on a machine that costs around $200 million and adds another chance for defects. High-NA machines cost about twice as much. Intel moves the thick power lines below the transistors, so the thinner signal lines on top do not have to be packed as
-
Why Did Intel's 10 Nanometer Node Slip?
Chris Auth says Intel's 10 nanometer node slipped because the targets were more aggressive than historical scaling, and extreme ultraviolet lithography was not ready when the node was defined.
Intel had kept a new manufacturing cadence about every two years. The original target launch was 2016, and manufacturing did not begin until 2018. The last set of products slipped almost four years. Engineers invented ways to hit the goal without new tools, and that burden landed on the process. TSMC put EUV into volume manufacturing in 2019 and ramped it further on its 5 nanometer node in 2020. Intel's first EUV process did not reach products until 2023, so TSMC had about four more years with the mac