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Why Can't Chip Fabs 10x Wafer Output for AI?
Pushkar Ranade, Intel's CTO, says the world's chip tools can about double leading-edge wafer output, not multiply it by ten, even if AI labs want far more chips.
ASML produces fewer than 100 extreme ultraviolet machines a year and does not plan to build significantly more than 100 a year by the end of the decade. That supply is split across Intel, TSMC, and memory makers such as SK Hynix. EUV is the bigger bottleneck, and it is not the only one. Once a flow such as Intel 18A is locked, the fab needs that specific tool from that supplier. Going from 18A to 14A, about 80 percent of the tool set can be reused, and the denser node still needs some new tools. Even with unlimited capital, extra wafers from the tools already installed would be incremental, because yield is already high and each extra 1 percent is hard.
Dwarkesh Patel puts AI compute growth at about 3x a year for a decade, and Ranade says that pace cannot continue unless the equipment suppliers, and their suppliers, all produce more.